In-Pixel Generation of Gaussian Pyramid Images by Block Reusing in 3D-CMOS
This paper introduces an architecture of a switched-capacitor network for Gaussian pyramid generation. Gaussian pyramids are used in modern scale- and rotation-invariant feature detectors or in visual attention. Our switched-capacitor architecture is conceived within the framework of a CMOS-3D- based vision system. As such, it is also used during the acquisition phase to perform analog storage and Correlated Double Sampling (CDS). The paper addresses mismatch, and switching errors like feedthrough and charge injection. The paper also gives an estimate of the area occupied by each pixel on the 130nm CMOS-3D technology by Tezzaron. The validity of our proposal is assessed through object detection in a scale- and rotation-invariant feature detector.
keywords: Gaussian Pyramid, In-pixel ADC, CMOS-3D, Scale-Invariant Feature Transform (SIFT)
Publication: Congress
1624015012977
June 18, 2021
/research/publications/in-pixel-generation-of-gaussian-pyramid-images-by-block-reusing-in-3d-cmos
This paper introduces an architecture of a switched-capacitor network for Gaussian pyramid generation. Gaussian pyramids are used in modern scale- and rotation-invariant feature detectors or in visual attention. Our switched-capacitor architecture is conceived within the framework of a CMOS-3D- based vision system. As such, it is also used during the acquisition phase to perform analog storage and Correlated Double Sampling (CDS). The paper addresses mismatch, and switching errors like feedthrough and charge injection. The paper also gives an estimate of the area occupied by each pixel on the 130nm CMOS-3D technology by Tezzaron. The validity of our proposal is assessed through object detection in a scale- and rotation-invariant feature detector. - M. Suárez, V. M. Brea, D. Cabello, R. Carmona-Galán, and A. Rodríguez-Vázquez - 10.1109/ISCAS.2012.6271850
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