Low-Power, Low-Latency Hermite Polynomial Characterization of Heartbeats Using a Field-Programmable Gate Array
The characterization of the heartbeat is one of the first and most important steps in the processing of the electrocardiogram (ECG) given that the results of the subsequent analysis depend on the outcome of this step. This characterization is computationally intensive, and both off-line and on-line (real-time) solutions to this problem are of great interest. Typically, one uses either multi-core processors or graphics processing units which can use a large number of parallel threads to reduce the computational time needed for the task. In this paper, we consider an alternative approach, based on the use of a dedicated hardware implementation (using a field-programmable gate-array (FPGA)) to solve a critical component of this problem, namely, the best-fit Hermite approximation of a heartbeat. The resulting hardware implementation is characterized using an off-the-shelf FPGA card. The single beat best-fit computation latency when using six Hermite basis polynomials is under 0.5ms0.5ms with a power dissipation of 3.1 W, demonstrating the possibility of true real-time characterization of heartbeats for online patient monitoring
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Publication: Congress
1624015046151
June 18, 2021
/research/publications/low-power-low-latency-hermite-polynomial-characterization-of-heartbeats-using-a-field-programmable-gate-array
The characterization of the heartbeat is one of the first and most important steps in the processing of the electrocardiogram (ECG) given that the results of the subsequent analysis depend on the outcome of this step. This characterization is computationally intensive, and both off-line and on-line (real-time) solutions to this problem are of great interest. Typically, one uses either multi-core processors or graphics processing units which can use a large number of parallel threads to reduce the computational time needed for the task. In this paper, we consider an alternative approach, based on the use of a dedicated hardware implementation (using a field-programmable gate-array (FPGA)) to solve a critical component of this problem, namely, the best-fit Hermite approximation of a heartbeat. The resulting hardware implementation is characterized using an off-the-shelf FPGA card. The single beat best-fit computation latency when using six Hermite basis polynomials is under 0.5ms0.5ms with a power dissipation of 3.1 W, demonstrating the possibility of true real-time characterization of heartbeats for online patient monitoring - Kartik Lakhotia, Gabriel Caffarena, Alberto Gil, David G. Márquez, Abraham Otero, Madhav P. Desai - 10.1007/978-3-319-31744-1_24
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