Verification of Split&Shift Techniques for CNN Hardware Reduction

The so-called Split&Shift (S&S) methodology has previously been introduced as an effective area saving technique for hardware implementation of Cellular Non-linear Networks. This work provides the first experimental proof of such a methodology through a circuit implementation over an FPGA platform. Results of area, processing time and functionality of different instances of the S&S methodology are given.

keywords: CNN, FPGA, Split&Shift Methodology, Hardware Optimization