Boosting the Memory Window of Memristive Stacks via Engineered Interfaces with High Ionic Mobility

Realizing the potential of oxide-based memristive devices for high-density data storage and energy-efficient computing still relies on overcoming key technical challenges, including the need for a larger number of stable resistance states, faster switching speeds, lower SET/RESET voltages, improved endurance, and reduced variability. Addressing these limitations requires innovative material design strategies. Here, we demonstrate that introducing a thin layer of oxide-ion conductor SrCoO3–x between the metal and the SrTiO3-based memristive elements, expands the number of distinguishable resistance states from ≈8 to ≈22. This modification also reduced the SET/RESET voltage by 50% and markedly improved device endurance, albeit with a trade-off of reduced state retention. To assess the performance of this architecture, we trained a two-layer fully connected neural network using the experimental SrTiO3/SrCoO3–x memristor characteristics on the MNIST handwritten digit dataset. Networks with hidden-layer sizes between 64 and 256 neurons achieved classification errors below 7%. Finally, we confirmed the transferability of this interface-engineering approach by applying it to HfOx-based devices, achieving a consistent enhancement in the resistive state window.

Palabras clave: resistive switching, interface engineering,, oxide electronics,multi level memory,matrix multiplier