PhD Defense: 'Statistical study of fluctuations in ultra-scaled multi-gate MOSFET transistors'

Transistors based on MOS (Metal-Oxide-Semiconductor) technology are fundamental in the development of domestic and industrial electronic devices, being the basis of memory and computer processing units. The reduction in size of these devices has followed the so-called Moore's Law, until numerous difficulties of a physical nature have arisen as a result of the small size of these devices. In addition to manufacturing errors, there are physical processes such as the discrete nature of the atom, the tunneling effect or quantum confinement, which produce deviations from the ideal behaviour of the device. The dimensions of current devices and the approach of new architectures make the classical trial and error methodology difficult, making it essential to use new tools for their development, such as computer-aided design or TCAD. 

In this context, the impact of different sources of variability (metal granularity, surface roughness, gate roughness or fluctuations due to random dopants) on different MOSFET architectures (FinFET, nanowire FET and nanosheet FET) will be studied.  The work will consist of the design and 3D simulation of these devices applying the TCAD methodology, together with subsequent data processing and analysis through statistical studies of variability and the development of empirical models. The aim of all this will be to determine which architectures are most advantageous in the face of certain sources of variability for future technological nodes.

Supervisors: Antonio García Loureiro y Natalia Seoane Iglesias