Doctoral Meeting: 'In-Pixel Analog Processing Elements of the HO-PBAS Algorithm for Background Subtraction'

In the context of vision-enabled IoT nodes, low-power consumption is a must. One possible solution is to perform low-level tasks as the background subtraction, which is one of the first steps in higher-level video processing algorithms, on the focal plane. Background subtraction, or equivalently foreground detection, is a fundamental task present in most computer vision applications such as video surveillance, optical motion capture or multimedia applications. This thesis explores a particular foreground segmentation method based on the well-known Pixel-based Adaptive Segmenter (PBAS) algorithm, proposing modifications that will ease the hardware implementation in a standard CMOS technology.

In this talk the current state of a CHIP design that implements the so-called Hardware-Oriented PBAS (HO-PBAS) in the focal-plane will be presented, showing the used circuits and the architecture of the massive-parallel analog processor.