Pelgrom-based predictive model to estimate metal grain granularity and line edge roughness in advanced multigate MOSFETs

The impact of different variability sources on the transistor performance increases as devices are scaled-down, being the metal grain granularity (MGG) and the line edge roughness (LER) some of the major contributors to this increase. Variability studies require the simulation of large samples of different device configurations to have statistical significance, increasing the computational cost. A novel Pelgrom-based predictive (PBP) model that estimates the impact of MGG and LER through the study of the threshold voltage standard deviation (σVTh), is proposed. This technique is computationally efficient since once the threshold voltage mismatch is calculated, σVTh can be predicted for different gate lengths (Lg), cross-sections, and intrinsic variability parameters, without further simulations. The validity of the PBP model is demonstrated for three state-of-the-art architectures (FinFETs, nanowire FETs, and nanosheet FETs) with different Lg, cross-sections, and drain biases (VD). The relative errors between the predicted and simulated data are lower than 10%, in the 92% of the cases.

Palabras clave: Variability, line edge roughness (LER), metal grain granularity (MGG), FinFET, gate-all-around (GAA) nanowire (NW) FET, Pelgrom