Publications

Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study

Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing

Maximum output power point tracking for photovoltaic energy harvesting systems: Mathematical model and circuit implementation

Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems

Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications

A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation

Ultra-low power CMOS circuit design for energy harvesting applications

Design of a 5-bit SRAM-based In-Memory Computing Cell for Deep Learning Models

An 11 mA Capacitor-Less LDO with 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing

0.6-V-VIN 7.0-nA-IQ 0.75-mA-IL CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies

A 0.6 V, ultra-low power, 1060 μm² self-biased PTAT voltage generator for implantable biomedical devices

Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations

1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter

On-Chip Solar Energy Harvester and PMU with Cold Start-Up and Regulated Output Voltage for Biomedical Applications

Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm² Subthreshold Voltage Reference for Implantable Devices

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology