Congress 1284
  • D. García-Lesta, P. López, V.M. Brea, D. Cabello
  • IEEE International Symposium on Circuits and Systems. Montreal, Canada. 2020
Research Areas

CMOS Vision Sensor for Background Subtraction

Background subtraction is one of the first steps in many video processing algorithms. Thus, a real-time processing with low power consumption is convenient for different applications where power hungry devices with high computational capabilities can not be deployed. This work presents the design of a 24x56 pixel proof-of-concept 0.18 um standard CMOS vision sensor chip implementing the foreground detection algorithm Hardware Oriented Pixel Based Adaptive Segmenter (HO-PBAS) on the focal plane. Simulation results show a maximum processing speed of 2000 fps with a figure of merit of 1.3 uW/pixel at 60 fps and a pixel pitch of 47 um in a four pixels per processing element configuration.
Keywords: CMOS vision sensor, focal plane, foreground detection, HO-PBAS
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