Discrete Time Cellular Non-linear Networks Implementation over FPGA

This paper introduces a parallel Cellular Non-linear Network implementation on an FPGA. Such an approach is intended for speeding-up early-vision applications, mainly in images with low resolution (≤ 50 × 50). Bigger images can be processed with an efficient computation time by means of windowing. Our implementation has been realized over an Altera Stratix-EP1S25F672 FPGA achieving a parallel implementation of a 25 × 25 effective grid.

keywords: Discrete-Time Cellular Non-linear Networks, FPGA, Gray-scale Processing, Early Vision