Low Power CMOS Vision Sensor for Gaussian Pyramid Extraction

This paper introduces a CMOS vision sensor chip in standard 0.18 μm CMOS technology for Gaussian pyramid extraction. The Gaussian pyramid provides computer vision algorithms with scale invariance, which permits to have the same response regardless of the distance of the scene to the camera. The chip comprises 176 × 120 photosensors arranged into 88 × 60 processing elements (PEs). The Gaussian pyramid is generated with a double-Euler switched-capacitor network. Every processing element comprises four photodiodes, one 8-bit single-slope Analog to Digital Converter (ADC), one Correlated Double Sampling (CDS) circuit, and 4 state capacitors with their corresponding switches to implement the double-Euler switched-capacitor network. Every processing element occupies 44 × 44 μm2 . Measurements from the chip are presented to assess the accuracy of the generated Gaussian pyramid for visual tracking applications. Error levels are below 2% full scale output (FSO), thus making the chip feasible for these applications. Also, energy cost is 26.5 nJ/px at 2.64 Mpx/s, thus outperforming conventional solutions of imager plus microprocessor unit (MPU).

keywords: CMOS Vision Sensors, Gaussian Filters, Image Pyramids, Switched-Capacitor Circuits, Per-Pixel Processing