Paula López Martínez

Maximum output power point tracking for photovoltaic energy harvesting systems: Mathematical model and circuit implementation
Kalman Filter-Driven Blind Source Localization for Passive 3D ToF Imaging
Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems
Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications
Pseudo-Passive Time-of-Flight Imaging: Simultaneous Illumination, Communication, and 3D Sensing
A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation
Fast Time-Domain Super-Resolution for Single-Shot Multi-Path ToF Imaging
Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect
Design of a 5-bit SRAM-based In-Memory Computing Cell for Deep Learning Models
A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation
Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF Sensor
An 11 mA Capacitor-Less LDO with 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing
0.6-V-VIN 7.0-nA-IQ 0.75-mA-IL CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies
A 0.6 V, ultra-low power, 1060 μm² self-biased PTAT voltage generator for implantable biomedical devices
Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations
1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter
CMOS Vision Sensor for Background Subtraction
On-Chip Solar Energy Harvester and PMU with Cold Start-Up and Regulated Output Voltage for Biomedical Applications
Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm² Subthreshold Voltage Reference for Implantable Devices
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology
Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology
Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications
Micro-Energy Harvesting System including a PMU and a Solar Cell on the same Substrate with Cold Start-Up from 2.38 nW and Input Power Range up to 10μW using Continuous MPPT
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications
In‐pixel analog memories for a pixel‐based background subtraction algorithm on CMOS vision sensors
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up
Shannon Entropy as Background Dynamics Estimator In Foreground Detector Algorithms
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms
Pulsed Time-of-Flight Pixel with on-Chip 20 klux Background Light Suppression in Standard CMOS Technology
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting
Real time architectures for the Scale Invariant Feature Transform algorithm
Live Demonstration: Wireless Sensor Network For Snail Pest Detection
Dynamic Model of On-Chip Inverting Capacitive Charge Pumps with Charge Reusing
Time-of-Flight Chip in Standard CMOS Technology with In-Pixel Adaptive Number of Accumulations
Design for Maximum Power Transfer Efficiency of Thermoelectric Generators using Mixed Mode Simulations
Study of the Thermoelectric Properties of Non-Typical Semiconductor Materials with Conventional CAD Tools
A Review of CMOS Photodiode Modeling and the Role of the Lateral Photoresponse
Dark Current Optimization of 4-Transistor Topologies in Standard CMOS Technologies for Time-of-Flight Sensors
Capacitance-based Wireless Sensor Mote for Snail Pest Detection
Distance Measurement Error in Time-of-Flight Sensors Due to Shot Noise
Four-transistor pinned photodiodes in standard CMOS technologies for time-of-flight sensors
Analytical Model for Crosstalk in p-nwell Photodiodes
Voltage Boosters for on-Chip Solar Cells on Focal-Plane Processors
Comparison of Photosensing Structures in CMOS Standard Technology for Time-of-Flight Sensors
Closed-form and explicit analytical model for crosstalk in CMOS photodiodes
CMOS photodiode model and HDL implementation
Experimental characterization of peripheral photocurrent in CMOS photodiodes down to 65 nm technology
A Verilog-AMS photodiode model including lateral effects
Analytical modelling of size effects on the lateral photoresponse of CMOS photodiodes
GPU-based infrared thermography for NDE of minefields
Evidence of the lateral collection significance in small CMOS photodiodes
A 2D model for radiation-hard CMOS annular transistors
Experimental analysis of CMOS short-channel gate enclosed transistors
Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields
A study of CMOS radiation tolerant transistors using Green functions
Non-destructive soil inspection using an efficient 3D software-hardware heat equation solver
Analytical model of short-channel gate enclosed transistors using Green functions
A dc I-V model for short-channel polygonal enclosed-layout transistors
Enclosed layout transistors in saturation
Modeling and simulation of CMOS APS
Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields
Sensitivity of photodiode-based CMOS APS in 0.18um technology: peripheral collection and optimum dimension
Bottom collection of photodiode-based CMOS APS
DT-CNN emulator: 3D heat equation solver with applications on the non-destructive soil inspection
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography